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TestChip Analog Engineer HVM/DV

San José, Provincia de San José, Costa Rica Job ID JR0269978 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Entry Level Full/Part Time Full Time
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Job Description


This position requires candidates to upload a resume in English, you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

Responsibilities include but are not limited to:

  • Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed-signal IPs.
  • Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models.
  • Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.
  • Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals.
  • Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.
  • Optimizes performance, power, area, and reduces leakage of circuits.
  • Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.

Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor’s degree in Electronics, Electrical Engineering or equivalent studies.
  • 1+ years of experience in an engineering position.
  • Intermediate to advanced English Level.
  • Must have permanent unrestricted right to work in Costa Rica.

Preferred qualifications:

  • 2+ Years of experience in the following:
    • Semiconductors.
    • Test development and execution using lab equipment for analog, mixed signal circuit characterization and debug.
    • Background and knowledge in hardware architecture analog, mixed signal design and implementation.
    • Scripting languages with emphasis on python, C#.
    • Simulation and validation experience with hardware description languages such as Verilog and/or System Verilog.
    • Product engineering or test content development.
    • Evaluation and validation of analog, mixed signal and DFT circuits including concepts such as timing jitter margining squelch equalization.
    • Knowledgeable in statistical data analysis using platforms such as JMP.
    • Silicon debug and characterization of new products including working with platform and system level validation teams to identify and close silicon issues.
    • Familiarity with high frequency signal integrity concepts using frequency domain Sparameter and time domain metrics.
    • Using software tools to analyze PCB physical layout and make recommendations on PCB design.

Inside this Business Group


Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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