SoC Logic Design Engineer

San José, Provincia de San José, Costa Rica Job ID JR0269560 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time

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Job Description

As a member of our logic design team, you will be responsible for a portion of the design of a high performance and low power chip targeted at networking and telecommunications. You will be focusing on such tasks as micro-architectural definition, RTL coding, Lint, Clock and Reset Domain Crossing checks (CDC and RDC), logic debug, timing closure, supporting verification and physical design.

Responsibilities:

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
Participates in the definition of architecture and microarchitecture features of the block being designed.
Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Follows secure development practices to address the security threat model and security objects within the design.
Works with IP providers to integrate and validate IPs at the SoC level.
Drives quality assurance compliance for smooth IP to SoC handoff.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or related degree.
3+ years’ experience in RTL design or logic design or ASIC design. (We will consider candidates with 6+ months experience on a case-by-case basis.)
Familiarity with Verilog or System Verilog.
Familiarity with scripting languages like Perl or Python.
Intermediate to Advanced English level.

Preferred Qualifications:

Intern experience in semiconductor industry

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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