SoC Logic Design Intern

Santa Clara, California, United States| Hillsboro, Oregon, United States| Austin, Texas, United States| Hudson, Massachusetts, United States Job ID JR0270279 Job Category Intern/Student Work Mode Hybrid Experience Level Intern Full/Part Time Full Time

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Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

Come join us -- In this role you will be part for the XEG design team, working on next-generation Xeon server product SOCs and IPs.

Who You Are

Your responsibilities include but are not limited to:

Strong analytical and problem-solving skills, with an ability to debug complex systems.
Ability to work effectively both independently and as part of a collaborative team.
Strong communication skills and attention to detail.
Willingness to learn and adapt to new technologies and tools.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Currently pursuing a Master's Degree or PhD in Electrical Engineering, Computer Engineering, or a related field.

Preferred Qualifications

Knowledge of digital logic design, SOC architecture, and system-level integration principles.
Knowledge with hardware description languages (Verilog, VHDL) and digital design concepts.
Experience with hardware integration and testing tools (e.g., oscilloscopes, logic analyzers, simulation software) is a plus.
Basic knowledge of the SOC development lifecycle, from design through integration and validation.
Knowledge of automated testing tools and scripting languages (Python, Perl, or TCL) is a plus.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, OR, Hillsboro; US, TX, Austin; US, MA, Hudson

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Annual Salary Range for jobs which could be performed in the US $63,000.00-$166,000.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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