Yield Analysis (YA) Engineer
Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany.
As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward.
Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.
This job requisition is to seek Yield Analysis engineering roles in FSM HVM Global Yield organization, reporting to YA team manager.
Selected candidates will work with other members in Global Yield org including Process Integration, Device and Defect engineering teams, fab module/yield teams and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.
Yield Analysis Engineers' responsibilities include (but are not limited to):
Own engineering projects involving large-scale data analysis and machine learning to support HVM yield roadmap, device targeting and attaining performance targets.
Work with Program Managers, Process Integration, Device and Defect Reduction team members to identify root cause of systematic yield/performance issues and propose mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
Work with Yield Modeling team to develop new yield analysis methods and algorithms to deliver world class yield analytics.
Formulate yield problems mathematically, identify solutions, and remove technical barriers to achieve successful solutions.
Provide yield analysis for various engineering projects to improve quality, performance and to reduce wafer cost.
Engineering support for technical interactions with internal and external customers.
Candidate should have the following behavioral skills:
Problem-solving technique with strong self-initiative and self-learning capabilities.
Ability to work with multi-functional, multi-cultural teams.
Must demonstrate solid communication skills.
Bachelor's degree in science and engineering major.
3+ years' experience in advanced node semiconductor industry in in yield analysis and data science. Level of experience will be considered in determining applicants job grade.
3+ years' Experience in python and other program languages to develop a new analysis method and algorithms using large amount of fab data.
3+ years' experience in big data analysis and machine learning.
3+ years' experience in advanced node semiconductor high-volume manufacturing.
3+ years' experience with Device Physics and overall FinFET process flow.
Advanced degree (Master's or Ph.D.) in science and engineering major.
Work experience in TFT environment.
Experience in serving external Foundry customers through technical interactions
Demonstrated interpersonal skills including influencing, engaging, and motivating.
Understanding on GAA (Gate-All-Around) technology architecture.
Experience in new semiconductor technology development.
Basic understanding on module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.