Physical Design Power Integrity Engineer

Hillsboro, Oregon, United States| Austin, Texas, United States| Phoenix, Arizona, United States| Santa Clara, California, United States Job ID JR0256712 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time

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Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

Life at Intel

Diversity at Intel

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.

As a Physical Design Power Integrity Engineer, your primary focus is on developing, running, and assessing reliability verification for ASIC designs. This includes assessing, fixing, and proposing improvements for IR drop, Signal EM, and other reliability related tasks.

Secondary, but useful to the job will be design and validates power management solutions, drives power delivery technology innovation, and enables power management and conversion components.

Conducts the design, development, and verification of on chip power grid, power gating, and power delivery circuits.

In addition, you may also:

Create models for power delivery networks including on die power gating and estimates peak current demands and voltage responses for various IPs.

Drive power distribution network architecture and integration requirements of IPs and subsystems for backend implementation.

Perform power integrity analysis, works on power noise reduction for high speed IO interconnections, and conducts verification of on chip power grid, power gating, and power delivery circuits for IP and SoC products.

ThePhysical Design Power Integrity Engineer should possess the following attributes:

Excellent communication and leadership skills.
Self-driven with ability to prioritize work and accomplish tasks quickly with good problem-solving skills.
Must be detail oriented with solid written and verbal communication for expressing technical ideas and initiatives.
Comfortable task switching and managing multiple tasks at the same time.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

What we need to see (Minimum Qualifications):

Bachelor or Master of Science degree in Electrical Engineering or Computer Engineering or related field of study.
7+ years of related industry experience.
3+ years’ experience with power integrity analysis.

How to Stand out (Preferred Qualifications):

Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study.
Demonstrate experience and hands-on practical knowledge with standard-cell based VLSI design methodology and relevant industry standard EDA tools.
Ansys Redhawk or Cadence Voltus experience strongly preferred.
Demonstrate strong analytical and problem-solving skills through relevant experiences with ASIC/SOC design convergence.
Good understanding of digital design, circuits, layout with a thorough understanding of CMOS processes.
Demonstrate experience in scripting with Unix shell, Perl and TCL.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research

Amazing Benefits!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits

Inside this Business Group

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. As stewards of Moore's Law, we persistently innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain, particularly for advanced products. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of Foundry Services within Intel Foundry. Foundry Services is a customer-oriented service organization. This business unit is completely dedicated to the success of its customers with full P&L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments.

Other Locations

US, TX, Austin; US, AZ, Phoenix; US, CA, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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