Analog / Mixed Signal DTCO Engineer

Hillsboro, Oregon, United States| Phoenix, Arizona, United States| Folsom, California, United States| San Jose, California, United States| Santa Clara, California, United States Job ID JR0259930 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced

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Job Description

Intel's Advanced Design (AD) team resides within the Design Enablement (DE) organization which works in close collaboration with our partners in process technology, IP, and products spanning client/server and networking. The primary focus of AD is to guide process technology definition, design prototypes in Intel's latest process technology, and support Intel's internal and external design customers.

Your responsibilities will include, but are not limited to:

In this position, you will focus on defining an analog/mixed-signal (AMS) design workflow within the requirements of Intel's newest process technology nodes.
The definition of technology design rules and supporting tools/flows/methods (TFM) must be considered in advance through the lens of AMS needs, and your role will be to analyze the impact of technology requirements and work with a One Intel mentality toward defining an AMS workflow which can support the performance, power, area, and Ease of Use requirements for competitive technology platform offering.
This role requires interfacing with across multiple teams and departments and incorporating many points of view and priorities when considering design solutions and providing crucial technology platform development inputs.

#DesignEnablement

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess a BS degree with 4+ years of experience or MS degree with 3+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering or related field.

Experience above in the following:

- Design Technology Co-optimization (DTCO) experience.

Preferred Qualifications:

- AMS design workflow activities such as Cadence/ Synopsys physical design tools (Custom compiler/ Virtuoso) and reliability.

- Experience with early process technology definition and workflow development.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, AZ, Phoenix; US, CA, Folsom; US, CA, San Jose; US, CA, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”