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Silicon Architecture Engineer

Folsom, California, United States| Hillsboro, Oregon, United States| Austin, Texas, United States| Seattle, Washington, United States| Phoenix, Arizona, United States| San Diego, California, United States| Santa Clara, California, United States| Hudson, Massachusetts, United States Job ID JR0259395 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced
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Job Description


Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

The CGAI architecture group is focused on execution in strategic growth areas of Gaming/Visual-Cloud and GPU-accelerated AI for Intel. In this challenging and forward-looking role, we are looking for outstanding architects at multiple levels to contribute to the SoC architecture team responsible for delivering complex multi-die high performance and low power GPU/AI/accelerator SoCs for discrete graphics, edge compute, visual cloud and server spaces.

The successful SoC Power Architect candidate would be expected, but not limited to:

  • Develop innovative and scalable solutions in the power, clocking, boot, thermal and reset domains across diverse workloads and product configurations.

  • Formulate scalable algorithms and proofs of solutions for limits management (power, thermal, current, VR, others), power management to achieve best in class PnP.

  • Comprehend the different layers of HW-SW interactions to create optimal architecture solutions and interfaces - from Drivers running on the Host to FW management across different SoC functions - suitable partitioning of responsibilities across different entities within the power management infrastructure.

  • Have a strong understanding and to align analysis of AI/3D rendering/media analytics/concurrent workloads and data (pre and post-Si) to identify and create maximum opportunities of proportional computing - ability to comprehend system performance bottlenecks for latency analysis and implications to closed/open loop optimal system solutions for best in class PnP.

  • Take ownership and delivery of architectural documents and engagements with implementation teams (design, verification, emulation and post-Si) to realize the system solutions - Writes clear and detailed technical documentation, specifications, and/or feature descriptions for complex projects to guide users and/or customers to use or implement output.

  • Provide multilayered technical expertise for next generation initiatives.

  • Influence SoC architects to align the SOC power architecture and Power management to the capabilities of the platform power delivery architecture to deliver optimized power efficiency and performance.

  • Perform with ambiguity and being able to adapt to evolving product requirements that are typical in the early architectural definition phase of programs.

  • Lead and drive virtual teams of senior cross-domain engineers.

  • Communicate a product vision clearly to team members and key partners and inspire actions that lead to great product definitions.

  • Knowledge of secure boot, system address map and requirements for PCIE/CXL devices and configurations to develop scalable boot solutions across HW/SW interacting with security, memory and DFX architects

  • Experience formulating the right boot and power management solutions in collaboration with Product and Platform, power Delivery and SW architects as well as SoC, memory, security, RAS, debug architects.

This position is not eligible for Intel immigration sponsorship.

Relocation assistance is not available for this position.


Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor’s degree in Computer Science, Computer Engineering or related STEM degree and 8+ years industry experience, or

Master's degree in Computer Science, Computer Engineering or related STEM degree and 6+ years industry experience in:

  • SoC Architecture experience in the areas of:

    • Power Management

    • Boot

    • Thermal

    • Reset

    • Clocking and adjoining areas.

Preferred Qualifications:

  • Knowledge of Graphics and accelerator architecture

  • Knowledge of PCIE and CXL protocols

  • Hands on Post-Si debug experience

  • Die-to-die integration and advanced packaging experience


Inside this Business Group


The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Other Locations



US, OR, Hillsboro; US, TX, Austin; US, WA, Seattle; US, AZ, Phoenix; US, CA, San Diego; US, CA, Santa Clara; US, MA, Hudson


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in US, Washington, California: $162,041.00-$259,425.00
*Salary range dependent on a number of factors including location and experience


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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