SOC Physical design Engineer

Bengaluru, Karnataka, India Job ID JR0251726 Job Category Silicon Hardware Engineering Work Mode On-site Required Experience Level Experienced Full/Part Time Full Time

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Job Description

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

Qualifications

You should possess a Master's degree in EE with at least 4 years of experience or a Bachelor's degree in EE with at least 6 years of experience in VLSI physical design. Additional qualifications include: Knowledge of microelectronic designs, semiconductor device physics, CMOS process and physical layout. Good understanding of complete Physical design flow. Hands-on experience in converging complex blocks from RTL to GDSII (more than 500K instances) with embedded macros and low power implementation. Experience with PCIE or LPDDR phy integration is an add-on. Tape out experience with good understanding of latest process nodes DRC's (10nm, 7m/5nm). Experience in automation for design methodology and flow development. Strong debugging skills is must and should come up with technical solutions independently. Experience in logic synthesis, timing constraint development, floorplan, power plan, CTS, routing and timing closure and DRC and LVS closure.Experience in backend verification flows like STA, FEV, IR-drop analysis and low power verification.Good hands-on knowledge on EDA tools like Synopsys FC/DC-ICC2, Primetime, Spyglass, Cadence LEC, Ansys Redhawk and Calibre Drv/ICWEBV2.Good knowledge in scripting languages like Tcl and Shell (csh/tcsh/bash). Hands-on Experience in developing utilities in TCL/TK. Familiarity with hardware description language such as Verilog or System Verilog.Must be a good team player. Efficient in working with cross functional/geo teams with strong communication and leadership skills.

Inside this Business Group

Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

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Working Model

This role will require an on-site presence.

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