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Senior DFT Engineer

Bengaluru, Karnataka, India Job ID JR0259986 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time
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Job Description


The Graphics hardware IP team , within the CGAI Client Compute Group and AI, is responsible for design and development of Graphics, Media and Display IPs as well as discrete Graphics SoCs GPUs, targeting both Client Device and Datacenter markets. The XSE organization is at the center of Intel's push into the discrete Graphics SoCs ARC GPUs market segment targeting next-generation applications such as High-performance computing, Deep learning / training, Cloud Graphics, Media analytics, High-end gaming.

  • Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs.

  • Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.

  • Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure highquality integration of the GPU block.


Qualifications


  • You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant schoolwork, internships, jobs and/or research experience.

  • Minimum skills and Experience:

    • Bachelors in Electrical/Computer Engineering or related field with 7+ years of academic or industry experience. Or a Masters in the same fields with 5+ Years of academic or industry experience.

    • Your experience should be in the following

      • At least one of the key DFT features such as TAP/JTAG, Scan/ATPG or Array DFT (MBIST/PBIST)

      • SoC IP DFT design integration or verification

      • EDA tools such as ATPG tools, Mentor Tessent shell, VCS simulation and/or debug tools.

      • Silicon enabling debug or test pattern development experience

  • Preferred Skills and Experience

    • At least one of the key DFT features such as TAP/JTAG, Scan/ATPG or Array DFT (MBIST/PBIST

    • EDA tools such as ATPG tools, Mentor Tessent shell, Synopsis VCS simulation and/or debug tools

    • Structural design flows, including timing, routing, placement or clocking analysis

    • SOC architecture, RTL coding and post silicon debug


Inside this Business Group


The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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