In this position, you will join the next generation CPU verification team and will be responsible for architecting and implementing pre-silicon and post-silicon validation strategies to exhaustively validate the architecture and micro-architecture changes implemented in the CPU.
Your responsibilities may include, but are not limited to, the following:
M.S. in Computer Engineering or Electrical Engineering plus 3 years of relevant work experience OR B.S. in Computer Engineering or Electrical Engineering plus 4 years of relevant work experience
Total of 4+ years of work experience in the following areas:
Computer architecture knowledge, including specific areas of technical ownership/expertise relevant to CPUs
Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
Standalone validation environment development in Verilog, Specman/E, System Verilog UVM/OVM Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
Assembly language programming, code generation, or other low-level software experience
Post-silicon debug and analysis
Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
Intel or industry experience in pre-silicon verification of CPU cores
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.
Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement
Experience using Formal Verification tools like JasperGold
Familiarity with emulation and FPGA as validation platforms
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
US, Oregon, Hillsboro