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Job ID: JR0041666
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations: US, Oregon, Hillsboro
Job Type: Experienced Hire

Senior CPU Verification Engineer

Job Description

In this position, you will join the next generation CPU verification team and will be responsible for architecting and implementing pre-silicon and post-silicon validation strategies to exhaustively validate the architecture and micro-architecture changes implemented in the CPU.

Your responsibilities may include, but are not limited to, the following:

  • Technical ownership of validation of a microarchitecture block, methodology, or otherwise significant aspect of CPU validation
  • Inventing and deploying new techniques across simulation, emulation/FPGA and virtual platform to accelerate validation of CPU hardware, firmware, and software domains
  • Unifying and executing functional, performance, and power validation tools and methods including dynamic, formal, and analytical approaches
  • Developing validation content like tools, test generators to match the complexity of new core and be reused in pre-si and post-si
  • Get the required technical specs and create high quality technical documentation like test plans, strategy documents
  • Coordinating global verification tasks requiring engagement from architecture, design, pre-si and post-si validation, and other teams across Intel to achieve project goals Influencing and contributing to post-silicon debug preparation and sighting resolution
  • Mentor junior team members to become the rock-stars of tomorrow.


Minimum Requirements:
M.S. in Computer Engineering or Electrical Engineering plus 3 years of relevant work experience OR B.S. in Computer Engineering or Electrical Engineering plus 4 years of relevant work experience

Total of 4+ years of work experience in the following areas:
Computer architecture knowledge, including specific areas of technical ownership/expertise relevant to CPUs
Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
Standalone validation environment development in Verilog, Specman/E, System Verilog UVM/OVM Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
Assembly language programming, code generation, or other low-level software experience
Post-silicon debug and analysis
Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
Intel or industry experience in pre-silicon verification of CPU cores

Preferred Requirements:
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.
Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement
Experience using Formal Verification tools like JasperGold
Familiarity with emulation and FPGA as validation platforms

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

US, Oregon, Hillsboro

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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