Pre-Si Verification Lead/Manger

Job Description

The Client Engineering Group Bangalore, India is looking for a highly motivated SOC Pre-Si Verification Lead/Manger to join the compute die frontend DV team for the next generation of Client SOC.

Responsibilities:

• Own or lead verification of complex flows at the SOC, subsystem, or IP levels
• Learn about the design and interact with partner teams to define verification strategies and test plans
• Develop verification environments and run and debug simulations to drive quality
• Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
• innovate to improve verification efficiency through methodologies or tools
• Coach and mentor team in your areas of expertise
• Demonstrate core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity and Inclusion
• Plan the verification of complex design IP/SS/SoC interacting with the architecture and design engineers to identify verification test scenarios.
• Manager/lead for the team to provide managerial and developmental support for the Verification team.
• Facilitate interactions with cross functional engineering organizations in supporting Project execution
• Project planning and scheduling of activities of local team and present and report progress on a regular basis.
• Develop strategies, provide guidance and support team in addressing failure events.

Qualifications

Qualifications :

• 7 or more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP's/SS.
• Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in SV-UVM.
• Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
  
  Desirable :
• knowledge in SoC high-speed IO protocols, Fabric, MemSS, Graphics, Multimedia, Coherency cluster integration and System level flows verification.
• Experience of working on x86 arch based High performing/Low Power SoCs.
• Scripting language such as Python or Perl.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.