CPU Physical Design Engineer

Job Description

Role and Responsibilities:

The Atom Group in DEG is looking for a CPU Physical Design Engineer to join one of the leading CPU Design teams in the world.

Responsibilities will include but not limited to:

• Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
• Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
• Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
• Possesses CPU-specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low-power synthesizable CPU.
• Optimizes CPU design to improve product level parameters such as power, frequency, and area.
• Participates in the development and improvement of physical design methodologies and flow automation.

Behavior skills we are looking for:

• Excellent communication skills.
• Effective team player with continuous learning mindset.
• Strong analytical and problem-solving skills.
• Be willing to balance multiple tasks.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidate must have a Bachelor's degree in Computer or Electrical Engineering and 4+ years of experience - OR - a MS degree in Computer or Electrical Engineering and 3+ years' experience.

• Physical design with synthesis
• Experience with APR flow tools like Synopsys Fusion, Cadence Genus/Innovus

Preferred Qualifications:

• Chip physical design verification including FEV, timing, electrical rules, DRC/LVS, Noise, RV
• Tools such as PrimeTime, PTSI, Conformal, LEC, Redhawk, Caliber and Duet
• TCL and Perl coding

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.