Senior Failure Analysis Engineer
Job Description
Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany.
Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development (TD) team, and FSM fab managers.
This job requisition is seeking a Failure Analysis & Fault Isolation (FA/FI) Engineer working in our Arizona Global Yield Development Laboratory which operates 24/7. Selected candidate will work in a dynamic team supporting technology development & yield improvement through targeted electrical and physical failure analyses (EFA / PFA). Team will support both product and test chips, spanning from data analysis & workflow planning, sample preparation, nanoprobing, tester based & static fault isolation, report generation and customer presentation. Engineers may focus on specific modules or cover full analysis flow.
FI/FA Engineers responsibilities include (but are not limited to):
Review incoming support requests and determine initial failure analysis / fault isolation workflow to identify & visualize root cause.
Hands on operation of laboratory equipment, such as curve tracing, photon emission microscopy, laser stimulation (OBIRCH), and infrared imaging systems.
Conduct failure analysis workflows using Ga & plasma FIBs, nanoprobing and sample preparation equipment. Mentor and coordinate workflows with supporting technicians.
Interact with Transmission Electron Imaging (TEM) experts to interpret and explain failure root cause.
Support continual improvement & development of new workstreams & techniques.
Develop a thorough understanding of upstream and downstream techniques in the lab and work seamlessly with peers of different disciplines to get high quality results with fast throughput time.
Present results of key analyses to internal and external customers.
Candidate should have the following behavioral skills:
Demonstrated strength in teamwork, analytical problem solving, and effective oral and written communication skills.
Inquisitive, desire to learn and expand knowledge in field.
Ability to work with multi-functional, multi-cultural teams.
Strong in decision making and problem solving.
Qualifications
Minimum Qualifications:
Bachelor's degree in science and engineering major.
2+ years' experience in a semiconductor failure analysis laboratory.
Preferred Qualifications:
Advanced degree (Master's or Ph.D.) in science and engineering major.
4+ years’ experience in a semiconductor failure analysis laboratory supporting advanced technology node technology development.
4+ years’ experience with 6T SRAM & logic failure analysis.
Experience operating fault isolation & failure analysis tools.
Understanding of FinFET technology architecture.
Knowledge of wafer fabrication and general microelectronics.
Knowledge of electrical and physical failure analysis flows for semiconductor.
Hands on experience operating laboratory equipment.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Annual Salary Range for jobs which could be performed in the US $105,797.00-$175,105.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will require an on-site presence.* Job posting details (such as work model, location or time type) are subject to change...Maggie 前沿安全研究員
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