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Device Design Engineer

Phoenix, Arizona, Amerika Syarikat| Hillsboro, Oregon, Amerika Syarikat| Santa Clara, California, Amerika Syarikat ID Pekerjaan JR0272555 Kategori Kerja Manufacturing and Process Development Mod Kerja Hybrid Tahap Pengalaman Experienced Jenis Waktu Bekerja Sepenuh Masa
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Job Description

Foundry Manufacturing and Supply Chain (FMSC) organization is the high-volume manufacturing arm of Intel Foundry, providing geographically balanced, sustainable, secure, and resilient supply chain at scale. The Development group within FMSC delivers customized, integrated technology solutions to our systems foundry customers using the installed high volume manufacturing base. The FMSC's Development group is seeking a highly skilled and experienced device technologist with experience in foundry technology development.

As a Device Design Engineer, you will be responsible for developing and customizing technologies currently in large volume manufacturing. The role is focused on CMOS device technology with embedded features to support a range of applications including automotive, analog, and RF capabilities. You will work closely with a team of engineers to push the boundaries of device performance, power efficiency, and scaling. This is a unique opportunity to contribute to the advancement of Intel Foundry's installed semiconductor solutions to serve a broad, diverse, and growing market.

Responsibilities:

  • Collaborate with the Technology Development team to develop new device technology and customize newly developed device architectures to customer needs.

  • Collaborate with the manufacturing team to develop and refine fabrication processes that meet device specifications and yield targets.

  • Develop CMOS logic device technologies with embedded features for a range of applications including automotive, analog, and RF solutions for foundry customer use in a large volume manufacturing environment.

  • Drive the development and implementation of customized semiconductor device technologies, ensuring compatibility with Intel's existing manufacturing processes and platforms.

  • Provide technical guidance and mentorship to junior device engineers, fostering a strong culture of continuous learning and development.

  • Stay updated with industry trends, emerging technologies, and customer needs to inform customization strategies and identify opportunities for improvement.

The ideal candidate must exhibit the following traits:

  • Demonstrated expertise in CMOS semiconductor device physics and fabrication of advanced transistor device architectures.

  • Proficiency in data analysis, scripting, and data analytic techniques to accelerate learning.

  • Strong technical problem-solving skills and excellent communication skills, with the ability to convey complex technical concepts effectively.

  • Ability to work collaboratively in a globally diverse, cross-disciplinary team to develop innovative device solutions on an aggressive schedule.

  • Desire to learn, lead, and influence cross-functional teams.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.  

Education Requirement:

  • Bachelor's degree in Electrical Engineering, Physics, or related field of study with 9+ years of industry experience OR

  • Master's degree in Electrical Engineering, Physics, or related field of study with 6+ years of industry experience

Minimum Required Qualifications

  • 5+ years of experience in advanced CMOS device technology, preferably in a foundry environment.

  • 5+ years of experience in the generation and analysis of device parametric data, design of experiment (DOE) principles, and engineering data analysis tools.

Preferred Qualifications:

  • Ph.D. degree in Electrical Engineering, Physics, or related field of study with 4+ years of experience in CMOS device engineering.

  • Hands-on experience in advanced node semiconductor technology device development.

  • Experience working on in 3nm-16nm F in FETs and sub 3nm GAA FETs.

  • Experience in a High-Volume Manufacturing environment.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, OR, Hillsboro; US, CA, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Annual Salary Range for jobs which could be performed in the US $189,060.00-$266,900.00*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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