E-core CPU Physical Design Engineer

Job Description

We created the Intel Atom Processor (E-Core), a disruptive technology that enables a broad range of devices including entry PC's, smartphones, modems, 2 in 1 laptops, micro-servers, and other Internet-of-Things IoT devices. You will be part of a team, participating in the design of a future generation high performance Intel Atom microprocessor. This role requires a engineer with strong analytic and problem solving skill, an ability to communicate well, and willing to share and discuss issues. You will work on implementation of CPU Core blocks from synthesis through post-layout verification and tapeout. You will develop the custom constraints for driving synthesis and Auto-Place and Route APR tools to implement and optimize the design to meet aggressive timing and power goals. You will work closely with micro-architecture, RTL, and custom circuit teams to converge the design to project targets.

The responsibilities will be tailored to the candidate's skills and expertise and will include several of the following, but not be limited to:

• Logic synthesis and place and route for CORE IP blocks.

• Performing floor-planning and routing studies and implementation.

• Block/sub-system level timing analysis.

• Work on low power techniques and power reduction in sub-system.

• Physical verification closure of block/sub-system.

• Scripts writing for data analysis and recipe creation.

• Strong analytical ability, problem solving and communication skills.

• Ability to work independently and at various levels of abstraction.

• Strong communication and team work skills.

• Capable of working in a high performing team to deliver the results required from the organization.

• Ability to work well in at team and be productive under aggressive schedules.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications:

• Must have either BS or MS in Electrical Engineering or Computer Engineering

• Minimum 5 years of experience in:
  - CPU physical design and timing verification.
  - Synthesis/APR flows on multi voltage high frequency designs including custom polygon editing.
  - Tcl scripting.
  - Noise, cross-talk, OCV analysis.
  - Floorplanning and physical design and timing closure.
  - Formal equivalence, DRC/LVS, IR and electro-migration checks.

Preferred qualifications:

• 6+ years of experience with the above skill sets.

• Experience with Fusion Compiler, DCT, DCE, ICC2, RedHawk, ICV, Conformal, Calibre, PrimeTime, StarRCXT.

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.