ISCP IP Office - IP Enablement Engineer

Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Want to learn more? Visit our YouTube Channel or the links below! 

• Life at Intel

• Intel Global Diversity and Inclusion

Who We Are

ISCG develops Intel SOC chipsets which are combined with Intel cores to deliver products to Client PC, Server workstation, and Automotive markets. Each of our SOC projects require over 100 IP which must be managed to meet requirements and integration times. IP Office program managers manage the procurement of IP from early SoC planning until products are qualified for production.

Who You Are
As a member of the ISCP IP Office, you have the opportunity to work with cross-divisional partners, external vendors, and ISCP development staff to procure and manage a diverse number of IP and associated collaterals meeting the requirements of several SOC projects in parallel. These SOCs directly feed Intel's product lines and Intel's bottom line. Key components of success will be forming IP contracts, prioritizing support needs, negotiating change orders, tracking deliverables, monitoring quality, identifying and resolving issues, and communicating status for numerous stakeholders. Provides regular feedback to IP providers and partners to drive future optimizations. Seeking technical program manager who is enthusiastically interested in working with others to manage a large portfolio of IP required for SOC integration.

You will be responsible for, but not limited to:

• Ensures the successful integration of IP into an SoC.

• Acts as the primary point of contact either from an IP team resolving SoC integration issues or from an SoC team responsible for managing the library of internally developed and externally supplied IP blocks and resolving quality and integration issues for IP.

• Translates and specifies technical requirements of IP, supporting integration queries and technical issues related to IP.

• Reviews IP performance and quality ensuring it conforms to the desired standards and targets and assists in creating design flows and verification methodology as required.

• Ensures IP consumption and use model is aligned with the architectural intent of the IP deliverables.

• Enhances customer user friendliness with application notes, white papers, and other supporting collaterals.

• Collaborates with external IP and EDA vendors to source components and tools, enabling selected IP from architecture through integration.

In addition to the qualifications listed below the ideal candidate will also have:

• Seeking technical program manager who is enthusiastically interested in working with others to manage a large portfolio of IP required for SOC integration.

• Effective at leading matrixed teams of technical experts to deliver complex projects: clarify requirements, establish timelines, align deliverables, and resolve issues.

• Comfortable working independently across organizational and geographical boundaries.

• Works across multiple disciplines (design, architecture).

• Comfortable working at all organizational levels.

• Excellent verbal presentation and written communication skills

• Discipline is key in maintaining quality and on-time execution.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering or similar discipline with 6+ years of experience or Masters degree in Electrical Engineering, Computer Engineering or similar discipline with 4+ years of experience.

Relevant experience should include the following:

• IP or SOC development.

• IP and associated use cases across multiple technology domains.

• IP development tools and flows, structural design and SoC integration methodologies

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Phoenix

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $161,230.00-$227,620.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.