SoC Design Engineer

Job Description

Come join Intel's Client Engineering Group, responsible for designing Client SOCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for an SoC (System on Chip) Engineer ready to research, design, develop, and test lead Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. This role is within Intel's highly-regarded Devices Development Group, headquartered in Portland, Oregon with additional sites in Penang, Malaysia, and Bangalore, India. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology. Your responsibilities may include but not be limited to: - Developing next-generation SoC designs, including microarchitecture development, RTL coding and integration, and physical design - Validating design and microarchitectural implementation and assumptions. - Developing solutions to problems utilizing formal education and judgment - Automating design tasks in order to complete the design in the most efficient fashion possible The ideal candidate will exhibit behavioral traits that indicate: - High motivation and results orientation - Strong problem-solving skills - Excellent interpersonal skills, including written and verbal communication - Willingness to work as part of a team collaborating in a fast-paced atmosphere

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or a related field - 6+ months of experience with design principles and techniques in two or more of the following areas: Computer architecture RTL design Digital logic and optimizations SOC design and integration Very Large Scale Integration (VLSI) Complementary MOS (CMOS) circuits and timing Preferred Qualifications: - Experience with Python, Perl, or other scripting languages

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Austin

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.