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Mixed-Signal Logic Design Engineer.

希尔斯伯勒, 俄勒冈州, 美国 職位 ID JR0262605 職位類別 Silicon Hardware Engineering 工作模式 Hybrid 經驗級別 Experienced 工时类型 全職
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Job Description


Technology Development (TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth. TD drives breakthrough research and develops next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.

The Design Enablement (DE) team in TD works closely with the technology team to maximize the value proposition of the technology for our customers thru Design Technology Co-Optimization (DTCO), delivers the Process Design Kits (PDKs) and foundational IPs (FIPs), and carries out technology lead vehicle execution for Si validation. Enablement and optimization of EDA reference flow and design flow on Intel technology play a crucial role in accomplishing DE's charter.

Responsibilities are the following but not limited to:

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

#DesignEnablement


Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have a MS degree with 2+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering, Computer Engineering, or related fields.

Experience in the following:

- Logic/RTL design.
- Digital architecture.
- Experience in one of the following: SystemVerilog, Verilog, ASIC, UVM, FPGA.

Preferred Qualifications:

-Experience with RTL system level validation.

- Experience with APR tools, flows and timing validation.


Inside this Business Group


As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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