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Job ID: JR0040893
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

DFT Engineer

Job Description
As DFT engineer, candidate is responsible for Design for Manufacturing and Testability of our products. Responsibilities include design & verification using: Scan ATPG tools for pattern generation and coverage debug, Gate Level Simulation for running these patterns through VCS simulations, Array DFT MBIST or LBIST for array testing, TAP for controlling and debug the design, and more.


Key Qualifications-The candidate should possess a B.Sc or M.Sc in Computer or Electrical Engineering with 5+ years of DFT experience.-Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools.-Excellent understanding of various DFx tools.-Experience using an interpretive language such as Perl, Python or Ruby.EducationMS or BS Degree in technical discipline

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.   We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.

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