Platform Signal Integrity Engineer

Job Description

Delivers signal integrity solutions for large, complex highspeed platforms, boards, and packages. Develops a viable space for all interconnects including 2D and 3D models extracts of electrical structures for the entire dietodie interconnect. Defines signal integrity rules, reviews implementation, documents characterization and measurement reports, and improves and optimizes design margins. Applies knowledge of signal integrity design and tradeoffs to perform simulations of interconnect and guide package and platform physical implementation, and designs and characterizes test structures to correlate simulations and measurements for interconnects using intricate highspeed equipment and debugs challenges. Develops electrical specifications and new industry standard interconnect specifications to guide consortiums for nextgeneration interfaces. Documents and provides implementation guidelines to the end customers as part of the platform design guide. Collaborates with IP design teams and silicon integration teams to ensure the IP and SoC designs maximize the platform level solution space to meet targeted product landing zone requirements and minimize quality degradation (e.g., attenuation, crosstalk, jitter, power noise) and cost.

Qualifications

Applicants should possess a Master's Degree or a Bachelor's degree with at least 4+ years of experience or working knowledge in the following:

• In-depth understanding of transmission line theory and electromagnetic field concepts.
• Design and analysis of high-speed digital interconnects, such as PCIE, DDR, ENET.
• Strong Signal Integrity fundamentals and good in system/board design knowledge and process.
• Good knowledge in 3D/2D EM simulation tools like HFSS/Q3D/ADS/HSpice/PowerDC.
• Lab equipment, such as oscilloscopes, TDRs or VNAs.
• Good communication skills and very good team playerPreferred Requirements:
• Experience with silicon device modeling methods, such as IBIS-AMI or Verilog-A.
• Experience in PCB layout review and associated tools, such as Cadence.
• Experience using scripting languages, such as Matlab or Python.
• Experience in design of package, connector, cable, socket, etc.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.