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Atom CPU Layout Design Engineer

Pulau Pinang, Malaysia| Kulim, Kedah, Malaysia ID Pekerjaan JR0258213 Kategori Kerja Silicon Hardware Engineering Mod Kerja Hybrid Tahap Pengalaman Experienced Jenis Waktu Bekerja Sepenuh Masa
Mohon

Job Description


We created the Intel Atom Processor (E-Core), a disruptive technology that enables a broad range of devices including entry PCs, smartphones, modems, 2 in 1 laptops, microservers, and other Internet of Things IoT devices. You will be part of a team participating in the design of a future generation high performance Intel Atom microprocessors. You will drive custom layout design for a range of memory compilers, custom IPs, and partitions in support of CPU products. Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding. Conducts complete layout verification including design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. Uses custom autorouters and custom placers to efficiently construct layout. Provides feedback to circuit design engineers for new feature feasibility studies and implements circuit enhancement requests. Develops and drives new and innovative layout methods to improve productivity and quality. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology issues used for layout design. The work is performed with broadly defined parameters and assignments are often complex and nonstandard in nature. Your responsibilities will include but not be limited to: -Independently assess and drive complex physical design assignments. -Work closely with circuit design engineers to interpret schematics and drive physical implementation. -Proficient with industry-based layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, and Fusion Compiler. -Experience ranging from leaf level cell design to integration is desired. -Collaborate closely with other SoC projects at various sites across Intel. -Ability to develop layout scripts macros and solutions is a plus.

Qualifications


Minimum Qualifications: - Candidate must possess a Bachelor's or Master's degree in Electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline with preferably at least 2 years of experience. Additional qualifications include: - Familiarity with Very Large Scale Integration VLSI and Complementary MetalOxide Semiconductor CMOS logic circuit design. - Knowledge in Unix/Linux operating systems.

Inside this Business Group


In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations



MY, Kulim


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Mohon
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