Firmware Architect/Engineer

Job Description

Architects and develops embedded software within environments that have constrained resources such as memory, interrupts, and processing power. Makes architectural decisions with a focus on software structure, interfaces, frameworks, protocols, algorithms, and/or validation direction. Often requires definition of complex software structures, algorithms, and/or design patterns for the purposes of interaction with Operating Systems, kernels, drivers, or other software. Often performs and leads pathfinding activities and explores future technologies.

In this position you will help us with the following responsibilities:

• Technical and hands-on experience on power management Client pre-silicon feature validation, Simics, and Test Environment model development.

• Understanding of IA SoC Hub Die and C Die disaggregated architecture with deep understanding of HW/SW and PM FW flows at silicon and platform level.

• Working with SoC Architecture, Silicon, SoC FW/SW, Simics, and SOC pre-and post-silicon validation teams to deliver SoC Power Management Firmware.

• Plan and drive TFM/DevOps needs for the Client Architecture and Firmware teams.

• Participate and drive power and performance micro-architecture optimizations.

Qualifications

Bachelors in Electronics/Computer Engineering, Computer Science, or any STEM related field with overall 9+ years of industry experience or a master's degree in Electronics/Computer Engineering, Computer Science, or any STEM related field with 6+ years of industry experience.

5+ years of experience in following is desired:

• Software programming in C/C++ and Python

• Power Management Micro Architecture

• SoC Pre-silicon and Post silicon Validation

• Simics and Test Environment developments

How to Stand out (Preferred Qualifications):

• Strong background in computer architecture especially Power Management Architecture with understanding of Intel SOC architecture.

• Experience with Firmware development and Validation for client SoCs.

• Experience in SoC FW IP TFMs - Tools, Flows and Methodologies, DevOps, GitHub, and Automation experience.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in US, California: $162,041.00-$259,425.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.