A Validation Steering Team VST Leader is responsible to lead a team of experienced SoC validation engineers to define Validation PORs, Silicon bring up, Silicon to Platform integration, as well as manage the planning and execution of product pre-si / post-si validation activities, to meet Landing Zone and TTM requirement.
This includes driving a diverse and cross functional validation team to successfully meet POR schedules, quality, standards and cost. As the VST leader, the successful candidate will be leading a cross functional team comprising of, but not limited to, SV, EV, SW/FW, Platform design, platform validation, PnP and PPV teams.
Must be willing to work with teams across multiple geographical locations and have hands-on involvement in team activities. Proactively able to contribute to development of best in class solutions to meet TTM commits.
Bachelors or Masters in Electrical/Electronics/Computer engineering with at least 5 years experience leading an engineering team.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.