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Job ID: JR0047497
Job Category: Engineering
Primary Location: Kulim, KDH MY
Other Locations: Malaysia, Penang;
Job Type: Experienced Hire

Pre-si Verification Staff Engineer

Job Description

Are you looking forward to designing products that get used by hundred millions of people in the world? Here is the opportunity: Join the PCH-specific Soft IP design and development team! Your work will be used in various platforms from servers to client to tablets to IoTs! Your families or friends or relatives who are not so tech-savvy can easily understand the work you do, as PCH is the controller hub for all platform-I/O e.g. USB, PCIe, HD Audio, etc which are very visible interfaces! This is the job so highly rewarding in all aspects and brings so much of job satisfaction! Don't hesitate further, apply the job now!

Job Description: Looking for passionate, motivated and self-driven candidate who likes to deal with different challenges and make a difference. Position requires experience in pre/post-silicon validation and exposure to digital logic design. Candidate will be responsible for pre-silicon verification in PCH-specific Soft IP PSI development team under PEG-ITG-CIG group. PSI team owns the Front End development of PCH-specific soft IPs e.g. GPIO, Clocking Unit, etc for Intel Client and Server PCH SOCs which attaches to every Intel Client and Server CPU sold. If you are someone who gets motivated by the fact that you are making positive difference in people's lives by delivering the designs that goes in all these products, then this is a place to be.

In this position you will work with R&D team whom designing the PCH-specific Soft IP for Intel latest product. You are expected to work closely with the Architect/u-architecture and Design teams in determining the proper validation strategy for new design, defining and feedback on verification plans, develop & implement White Box Coverage plans, participate and review validation codes for efficiency/coverage and drive any paradigm shifts needed in Validation execution.

Your responsibilities will include but not limited to:

- Defining and implementing the validation testplan,

- Validating and verifying the functionality of new architectural features of next generation designs by developing testplan, tests content or test tools.

- Finding and implementing corrective measures for failing RTL tests

- Developing automated tools or scripts for the pre-silicon validation environment.

- Technically leading a team of validation engineers to achieve validation goals


  • The candidate must possess a minimum of Bachelor Degree in Computer Engineering or Electrical/Electronics Engineering.
  • 10+ years of experience in relevant pre-silicon verification/logic design position and must have gone through multiple project cycles to gather in-depth experience.
  • 10+ years of experience in pre-silicon verification with various tools and methodologies including but not limited to: System Verilog, Perl/Shell scripting, VCS/Synopsys simulators, interactive debugger, RTL model build, testbench development, power-aware simulation, design-for-test, design-for-verification, coverage-based random constraint simulation.
  • 10+ years of experience in PC Architecture.
  • Capable in developing testplan, tests contents and coverage points for validation purpose based on High Level Architecture spec.
  • Experience in VLSI or Structural and Physical design flow/methodology.
  • Experience in USB, PCI express or any Industrial standard bus protocol would be added value.
  • Strong analyzing and debugging skill, and creative in problem solving.
  • Experienced in leading a team of 3+ engineers or related leadership experience would be plus.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

Malaysia, Penang;

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