Pre-Si emulation-FPGA solution Graduate Trainee
This position is to be part of the Malaysia Design Center MDC under Pre-Silicon Solution and Capabilities PSC group within the Manufacturing & Validation Engineering MVE organization in Penang. Responsibility includes developing capabilities on pre-silicon environment in Virtual Platform/Emulation/FPGA, model build and compilation, validation test development and platform debug. The candidate will be working on Intel SoC silicon development, involve in front-end and back-end compilation to build pre-si model virtual platform/emulation/FPGA for system validation. This required broad understanding of multiple system architecture, and protocol including PCIe, USB, LPDDR, UFS, eMMC, SD, I2C, SPI and etc.
Inside this Business Group
Bachelors/Masters in Computer Science/Electrical/Electronic Engineering. Knowledge in C/C++, System Verilog, Python, IA, SoC Architecture, UPF and Low Power Flows.Experience in debug, RTL validation, SW validation, Power/Perf validation or manufacturing validation is a plus. Experience in Emulation, Virtual Platform, Altera/Xilinx/Synopsys/Mentor/Cadence Tools Flow, HAPS is a plus.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.