In this position you will be responsible to drive the validation activities of IPG's test chips roadmap across Intel's 10nm, 14nm and future process technologies as well as a portfolio of Chipset Soft IPs e.g. Audio, Security, PCIe, USB, Sensors, Storage.
The Validation PM is expected to:
-Oversee planning/tracking of pre/post silicon validation activities in support of Project specific milestones and in accordance with PLC guidelines.
-Interact closely with SV and EV Engineering teams, comprehend key validation dependencies and help remove roadblocks.
-Coordinate and negotiate receivables/deliverables with external stakeholders, e.g. SW/FW, FPGA, HW, Silicon Design, etc.
-Represent the IP Validation team in project specific as well as senior management forums providing indicators e.g. Progress Against Schedule, Quality, risk assessment, mitigation plan, bug analysis, etc.
-Bachelor of Science degree in Electrical Eng. and/or Computer Science/Eng.
-Proven track record of project and people management, in either Silicon, HW, FW, or SW Design and Validation
-A highly motivated team player with strong organizational and planning skills as well as solid verbal and written communication skills
-Design and/or validation experience of standard bus protocols e.g. PCIe, MIPI, USB, etc.
-Solid strategic thinking paired with strong analytical capabilities
-Excellent collaboration skills, including out-of-the box thinking and flexibility
-An ability to embrace ambiguity and change while taking informed risks
-Understanding of a subsystem HW/SW stack, including the silicon, HW components, drivers, and applicationsInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.