Job Description Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.Your responsibilities will include but are not limited to:Pre-silicon verification activities for Imaging IP.Develops and maintain pre-Silicon functional validation tests to verify simulator, FPGA and Emulation platforms.Work closely w/ the Architect, Design, PFW and Simulator teams in determining the proper validation strategy for new design, defining and provides feedback on Test Plans
Qualifications:Bachelor's degree with 3+ years of experience in relevant Pre-Silicon validation position.Experience in logic design/verification with various tools and methodologies including: System Verilog, Perl, OVM/UVM, VCS/synopsys simulators, Coverage Tools.Experience with C/C++, Python, and/or other simulation and modeling tools/languagesExperience with Linux/Unix operating systemExperience with FW/SW development is a plus Experience with simulation and verification for FPGA and Emulation platforms is a plus.Experience with System C architecture modeling/Virtual prototyping is a plus.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.