Job Description: The Big core team develops the Processor cores that go into Intel's Client and server products. You will be part of the Back End Integration team that is delivers the hardened core IP. The role involves floor planning the core IP to meet stringent Timing, Area and Power goals and requires communication and coordination with owners of sub blocks to achieve these goals. Challenges include but not limited to comprehending & influencing metal stack/patterns on Process flavors for product goodness, optimizing critical cuts to save Core area that has huge impact to Intel bottom line and working with SoCs on Core Interface and Integration optimizations. You will also be responsible for closing DRC and LVS and the IP level and you will work with our internal customers to ensure that the Core is correctly integrated into the final SoC. Exposure to high speed design, processor design and data path design is highly desirable.
16+ years of experience in Full-chip layout domain. Relevant experience related to Big Core design will be an advantage.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.