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Job ID: JR0020783
Job Category: Contract Employee
Primary Location: Folsom, CA US
Other Locations:
Job Type: Intel Contract Employee

Graphics Hardware Debug Engineer

Job Description

In this position, you will be responsible for Graphics Hardware Validation and Debug related activities covering the various Features of Processor Graphics like 3D, GTI, blitter, and GPGPU, Media, Display for pre- and post-silicon validation and debug. The environment will be focused towards Apple based MacOS environment. From a technical debug perspective, drive a regular debug forum for the team to help expedite debugs and make sure the appropriate external stakeholders are engaged. And when appropriate, form task force sessions to drive more urgent issues to resolution. You will be expected to leverage best known methods and tools from existing Intel validation organizations. The successful candidate will demonstrate excellent problem solving skills as well as strong written and verbal communication. A highly self-motivated team player is desired. You should possess a strong vision for continuous validation improvements. Strong networking and influencing skills are needed. You should be a team player with good organizational, planning and communication skills. You should have a passion for validation and program management, be highly motivated and have a strong work ethic, You will need to show the ability to deal with some ambiguity in defining activities and direction. Responsibilities will include but not be limited to: Developing pre/post-si validation test strategies, plans, and schedules, then driving Execution of the written test plans and procedures.  Planning and scheduling of weekly tasks for meeting medium and long-term validation deliverables Monitoring progress against schedule communicating status. Identify and collect pertinent data to influence decisions when presenting to various management forums. Ability to work with broad group of peers. Driving issue resolution with software and hardware development teams Working cross-site and cross-geos. Enhancing existing pre/post-si validation methodology and processes.

This position is an Intel Contract Employee (ICE) and is located in Santa Clara, California. Intel Contract Employees are hired directly by Intel on a fixed term or specified purpose contract and are employees of Intel for the duration of the contract.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:

Must have a BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science or at least 5+ years of semiconductor industry/high technology based experience
Minimum 5 years of experience in Post Silicon Debug /Validation and/or Emulation

Preferred qualifications:
-Graphics knowledge / HW validation background- Knowledge of MacOS environment.
-Device Driver and Kernel level debugging knowledge.
-RTL debug knowledge

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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