Senior CPU/SOC Pre-Si Design validation Engineer
- Responsible to validate and integrate third party Intellectual Properties (IPs) ensuring they meet product specification and functionality before they are productized into physical chip. Required to work very closely with design teams and architects to implement the low-level Register Transfer Logic (RTL) design to ensure overall good functionality of the chip.
- Develop specific test environment/platform, validation methodology and test plan to validate System on Chip (SOC) design by identifying and exercising boundary conditions and special cases in an effort to "break" the chip to find that last elusive bug.
Bachelor degree or Master in Electrical and Electronics, Computer Engineering or Computer Science with at least 5 years of relevant experience in System on Chip (SOC) design and validation experiences.