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GenAI Applications Intern

瓜达拉哈拉, 哈利斯科州, 墨西哥 職位 ID JR0273363 職位類別 Intern/Student 工作模式 Hybrid 經驗級別 Intern 工时类型 全職
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Job Description

Intel Labs in Mexico is seeking a motivated student to explore and implement cutting-edge applications of Large Language Models on Intel hardware, with a special emphasis on FPGA-based solutions and engineering knowledge graphs. As part of this internship, you will be part of a small Research and Development team, that path finds next-gen technologies to improve Intel's products.

This position is with Applied Pathfinding and Prototyping Lab (APPL), within Intel Labs, which is responsible for pathfinding and prototyping full FPGA based prototypes of various cutting-edge solutions for researching future directions for Intel products and their role in the overall computing system.

Your responsibilities will include but not limited to:

  • Work on pathfinding projects on how to improve the efficiency of RTL design for FPGA and ASIC flows.
  • Develop FPGA-based AI prototypes leveraging Intel FPGAs (e.g., Stratix, Agilex) by investigating accelerated inference workflows.
  • Work on bringing up modern LLMs on Intel hardware for local infrastructure and benchmark different model architectures for latency, throughput, and energy efficiency.

Qualifications

Minimum qualifications are required to be initially considered for this position.

  • Enrolled in Master's degree program in Electrical Engineering, Computer Science, or related fields (at least 1 year remaining as an active student).
  • 1+ years of experience with FPGA design flows (Intel Quartus or similar) and hardware description languages (VHD, Verilog or SystemVerilog).
  • 1+ years of experience with machine learning frameworks (Pytorch, TensorFlow) and Python scripting language.
  • Advanced English level.

The position is in Mexico, it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

  • Enrolled in PhD degree program in Electrical Engineering, Computer Science or related fields.
  • Familiar with oneAPI, OpenVINO or similar Intel toolchains.
  • Experience deploying LLMs on clusters.
  • Exposure to LLM architectures and large-scale deep learning models.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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