SOC Pre-Si Verification Engineer

Job Description

• Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
• Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
• Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre silicon environment. Finds and implements corrective measures to resolve failing tests.
• Collaborates and communicates with SoC architects, micro architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
• Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products.

Qualifications

• BS/BTech degree with 10 years of experience, or MS/MTech degree with 8 years of experience in SoC emulation validation i.e. developing verification components integrating IP verification content to SOC preparing and executing test plan for complex clusters, subsystems for emulation platform.
• Good understanding and working experience in HVL System Verilog HDL, Verilog, C or C++ and scripts Perl shell Knowledge, experience in Industry standard emulation and debugging tools i.e. Zebu and/or palladium etc..
• Good understanding of SoC Fabric [CXL mainly, cache coherency), Graphics and Power Management clusters.
• Excellent debugging and analytical abilities.
• Qualifications BE or B Tech or M Tech ECE or Computer Science with 8-10 years emulation model bring-up and emulation verification experience at SoC level.
• Emulation verification experience is an added advantage.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.