Senior IP Design Verification Engineer

Job Description

• Performs functional verification of IP logic to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

• Good problem-solving skills and a self-starter.
• Ability to drive solutions to complex problems.
• Develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
• Ability to comprehend content of technical specifications for architecture, microarchitecture, registers, and schematic.
• Highly motivated to learn IP architecture and new verification tools/flow/methodology and adapt to fast-changing technologies and environments.
• Effective communication and collaboration skills. A
• Ability to work effectively in a cross-site team environment.

Qualifications

• Bachelor's Degree in Electronics Engineering, Computer Engineering with 8+ years of experience
• OR Master's Degree in Electronics Engineering, Computer Engineering with 6+ years of experience
• OR PhD in Electronics Engineering, Computer Engineering with 4+ years of experience.
• Experience in System Verilog, familiar with UVM methodologies and Python Script.
• Experience with hardware and software debugging tools
• Experience in IP verification

• Experience with either major industrial standard I/O interfaces such as PCIe/AXI/AHB/APB/CHI is a plus.
• Experience in coverage driven verification

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Annual Salary Range for jobs which could be performed in the US $161,230.00-$227,620.00*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.