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Design Automation Engineer

Folsom, California, Hoa Kỳ| Hillsboro, Oregon, Hoa Kỳ ID Công việc JR0251990 Ngành nghề Silicon Hardware Engineering Chế độ làm việc Hybrid Mức độ kinh nghiệm Experienced Loại Giờ Làm Việc Toàn Thời Gian
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Job Description


Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!


Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe.

As Design Automation Engineer within Intel Foundry Service (IFS), you develop, maintain, and enhance analog modeling, simulation, and verification methodology and solutions. You will be able to support a team of Analog and customs design engineers in all steps of design process. Be familiar with different technology nodes and provide flows/methodologies for the different tool sets. As a member of a centralized CAD team, you will collaborate with the analog, mixed-signal, and digital design teams within Intel as well as EDA tool vendors to drive and coordinate effort of developing and validating simulation flows, enhancing custom design environment, validating checks, and doing results analysis.

The chosen candidate will also have the following skills in addition to the qualifications listed below:

  • Mission critical to be a team player.
  • Demonstrable communication skills (verbal + written) and evidence of abilities to represent Intel externally.
  • Organizational, planning, and prioritization skills, and managing multiple activities.
  • Partnership approach to drive internal and external collaboration.


Qualifications


What we need to see (Minimum Qualifications):

  • Bachelor degree in Electrical Engineering, Computer Engineering, or similar discipline and 3+ years’ experience OR Master’s degree in Electrical Engineering, Computer Engineering, or similar discipline and 2+ years’ experience OR PhD Degree in Electrical Engineering, Computer Engineering, or similar discipline. 
  • 2+ years’ experience with scripting tools such as Perl/Python/Shell.
  • 2+ years’ experience with EDA (electronic design automation) tools such as Cadence, Synopsys, Ansys, Siemens, etc.

How to Stand out (Preferred Qualifications):

  • Bachelor degree in Electrical Engineering, Computer Engineering, or similar discipline and 5+ years’ experience OR Master’s degree in Electrical Engineering, Computer Engineering, or similar discipline and 3+ years’ experience OR PhD Degree in Electrical Engineering, Computer Engineering, or similar discipline and 2+ years’ experience.
  • 2+ years of experience with Cadence Virtuoso Schematic Editor.
  • 2+ years of experience with simulation tools for transistor level design: Hspice, Spectre, XA, or Cadence Analog Design Environment (ADEXL/Assembler/Maestro).
  • 2+ years of experience with design of analog/digital/mixed-signal blocks at transistor level.
  • 2+ years of experience with AC/DC/TRAN analysis.
  • Familiar with Process Design Kit (PDK) and design libraries.
  • Familiar with statistical analysis such as Monte Carlo sampling.
  • Familiar with netlist flow and post-layout extraction.
  • Familiar with reliability verification. Exposure to aging (agemos/relXpert), EM/IR (totem/Redhawk).
  • Familiar with Layout verification methodology such as LVS and DRC.
  • Exposure to Cadence "SKILL" scripting.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Amazing Benefits!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment.  Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits


Inside this Business Group


Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.

Other Locations



US, Hillsboro


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in US, California: $123,419.00-$185,123.00
*Salary range dependent on a number of factors including location and experience


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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