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DFT Design Engineer

Bengaluru, State of Karnataka, Ấn Độ| Hyderabad, State of Telangāna, Ấn Độ ID Công việc JR0272899 Ngành nghề Silicon Hardware Engineering Chế độ làm việc Hybrid Mức độ kinh nghiệm Experienced Loại Giờ Làm Việc Toàn Thời Gian
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Job Description

  • As a DFT engineer in the DFT and Manufacturing (DMT) organization, you will work to develop test automation solutions Design-for-Test (DFT) insertion and verification, test development, logic test content generation e.g. Automatic Test Pattern Generation (ATPG) and modular test content reuse.
  • You will architect, develop and deploy CAD capabilities to address problems in this space and adapt off-the-shelf capabilities where available to build solutions. You will collaborate with an interdisciplinary team spanning chip design, product development and process technology development.
  • The ideal candidate should exhibit the following behavioral traits:
  • Analytical skills for problem abstraction
  • Ability to apply scientific methods to investigate problems and to reduce ambiguity in making technical decisions.
  • You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
  • Currently, the work model is hybrid

Qualifications

Minimum Qualifications:The candidate must possess a BS, MS in Electronics/VLSI Design/Computer Engineering or Computer Science, with a thesis in the area of DFT, test CAD with 5+ years of experience.Candidate must have experience in following area:

  • Logic and memory design principles, VLSI design flow and VLSI CAD algorithms.
  • Tool, flows and methodology development for DFT insertion and test generation needs.
  • Strong understanding of VLSI design principles and digital logic design
  • Expertise in DFT methodologies including scan chain design, ATPG, BIST, and boundary scan
  • Proficiency with EDA tools like Synopsys, Mentor Graphics Tessent, Cadence.
  • DFT scan architecture and execution experience.
  • Programming skills with one or more of the high level languages e.g. C++/C/TCL/Perl/Python etc.
  • Ability to work independently and collaborate effectively with cross-functional teams
  • Theoretical knowledge in computer science, including algorithms and data structures.
  • Standard software engineering practices for version control, configuration management, debugging and validation.

Preferred Qualifications:

  • Detailed understanding of design-for-test (DFT) principles and knowledge of software design patterns and programming paradigms
  • Linux OS features and scripting languages

Inside this Business Group

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.

Other Locations

IN, Hyderabad

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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Maggie Offensive Security Researcher

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