IFS, Senior DFT Engineer
Job Description
Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN).
Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST).
Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE).
Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT.
Optimizes logic to qualify the design to meet power, performance, area, timing, testcoverage, DPM, and testtime/vectormemory reduction goals as well as design integrity for physical implementation.
Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications.
Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure highquality integration of the IP block.
Collaborates with postsilicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation.
Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.
Qualifications
Minimum qualifications are required to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 7+ years of industry experience inclusive of:
Expert knowledge in industry standard DFT solutions (e.g., Scan/ATPG, Memory BIST/BISR, Logic BIST, iJTAG etc.)
Experienced in defining DFT architecture, and developing tools/flows/methods for DFT insertion and validation
Experienced in DFT timings analysis and SDF-annotated GLS
Experienced in supporting post-silicon validation and manufacturing test
Preferred Qualifications:
Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field
Experienced in mentoring teammates
Knowledgeable in adjacent areas of the SoC development process (e.g. synthesis, static timing analysis, formal equivalence checking, etc.)
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Inside this Business Group
Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. As stewards of Moore's Law, we persistently innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain, particularly for advanced products. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of Foundry Services within Intel Foundry. Foundry Services is a customer-oriented service organization. This business unit is completely dedicated to the success of its customers with full P&L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.Maggie Offensive Security Researcher
Tôi luôn muốn đóng góp được điều gì đó giúp thay đổi thế giới. Tại Intel, tôi cảm thấy mình được đánh giá cao và tự tin hơn vào bản thân. Điều đó khiến tôi nghĩ rằng mình có khả năng làm được những điều tuyệt vời.
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