Skip to main content

Systems Design and Applications Manager

San Jose, California; Santa Clara, California; Arizona; Remote Job ID JR0232950 Job Category Engineering Work Mode Hybrid Experience Level Experienced
Job Description

Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person globally, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenges that come with changing the world.

We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.

As a member of Intel's Programmable Solutions Group, you will use your knowledge of Logic Design, Verification, and high-speed IO/SERDES technology to lead a team of experts operating at the system level in enabling customers, both internal and external, to use the Structured ASIC technology. The position requires a self-driven candidate with deep knowledge in design, verification, and communication interfaces, along with excellent communication skills.

Structured ASIC team: This is a structured ASIC team under Intel's PSG and is targeting 5G, cloud computing, and high-end consumer application space. eASIC devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs bridging the gap between FPGA and Custom ASIC.

Responsibilities include but not limited to:

  • Provide applications leadership to internal and external customer programs pre and post silicon.

  • Manage/Develop collaterals such as Handbook, Datasheet, and Application notes.

  • Create protocol specific use models.

  • Perform protocol specific characterization and author characterization reports.

  • Work with IP teams and customers to ensure proper usage of the SERDES for various applications and protocols.

  • Define methodology for high-speed serial IO measurements.

  • Validate PCS and PMA blocks of the transceiver Leading and dotted line managing the characterization team.

  • Engage customers to explain current and future SERDES architectures and requirements.

  • Gather requirements for next generation SERDES and demonstrating technology capability.

  • Lead the advanced customer support and design win effort as it relates to SERDES Design, Simulation, Bring Up Characterization, and Evaluation Train and provide engineering support to Intel's worldwide customers and Applications team.


Qualifications

Relevant experience can be obtained through work, classes, projects, internships, and/or military experience. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement

Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

  • 10+ years of relevant experience, experience should include:

  • Design, development, implementation of FPGAs or ASICs.

  • SERDES and protocols (such as PCI Express, 10GBASE-KR/SR/MR/ER/LR, 25GBASE-KR,  JESD 204X, CPRI/OBSAI, DisplayPort, HDMI, VbyOne or etc.).

  • Programming and data analysis using Python, Matlab, Perl, C++ or any Object-Oriented language.

  • SI Concepts, including sources and causes of noise and jitter.

  • Testing equipment, such as high-speed oscilloscopes BERTs and VNA.

  • Leading a technical team.

Preferred Qualifications

Experience in one (or more) of the following is considered a plus factor

  • Communication systems theory relating to SERDES.

  • SERDES IP architecture and implementation.

  • Analog and digital design.


Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US,CA,Santa Clara;US,AZ,Virtual


Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in US, Colorado:$148,930.00-$238,410.00

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • Senior Staff Device Engineer (SK) Multiple Locations Apply Now
  • Senior Staff Process Engineer - Wet Etch/Cleans (SK) Multiple Locations Apply Now
  • FPGA Architect Multiple Locations Apply Now
View All Jobs

No jobs have been viewed recently.

View All Jobs

No jobs have been saved.

View All Jobs