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Frontend Tool Flow and Methodology (TFM) Lead

San Jose, California; Hillsboro, Oregon; Austin, Texas Job ID JR0232955 Job Category Software Engineering Work Mode Hybrid Experience Level Experienced
Job Description

The Programmable Solutions Group at Intel is seeking a seasoned Frontend Tool Flow and Methodology (TFM) Lead to define and lead our strategies towards industry leading frontend design entry, checking and release methods. The Frontend TFM Lead is the organization's expert to spread industry best practices for RTL design to the products of the PSG supporting FPGAs. This is an excellent opportunity to join a highly inclusive and talented cross-functional team to maintain best-in-class design methodology that is extending beyond silicon development activities into end-to-end FPGA program enablement. This dynamic role will involve direct working relationships with Intel senior management and the technical community at Intel and the industry with immense opportunity for rapid learning experience and personal growth.

As a principal engineer of the organization, the Frontend TFM Lead will direct and guide RTL coding practices and workflow that provide better efficiency for downstream flows (for example, design-for-test, design verification, emulation, and place-and-route physical implementation). Responsibilities include: Seek to understand the inefficiencies that design teams currently face, orchestrate solutions, and align the organization to these solutions; Work cross functionally with the Software organization and other groups to support a development ecosystem for Intel's FPGA customers. The ideal candidate for this role has demonstrated a track record for driving project technology readiness or pathfinding phase, leading to predictable execution of actual product development without compromising quality.


You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Education Requirement:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications
9+ years of RTL design experience

2+ years of supporting or leading RTL Development Teams

2+ years of experience in emulation and verification
5+ years of experience organizing RTL source into reliable project build recipes for various end targets

5+ years of experience with scripting languages to customize EDA tool usage and to develop wrapper flows

Preferred Qualifications:
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Experience with RTL design release process and able to promote industry best practices

Experience with leading technology readiness or pathfinding phase of a silicon development project
Experience using Synopsys VCS, Cadence Xcelium, or Mentor Questa simulators

Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

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Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here:

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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