RTL Verification Engineer
As an RTL Verification Engineer within the Design Creation and Debug Group, you can expect to work on validating PSG's System-on-Chip integration tool, Platform Designer, with responsibilities covering a variety of IP components spanning from Memory Mapped and Streaming Interconnect blocks, microprocessors & microcontrollers and an assortment of components supporting embedded FPGA design and debugging flows. The charter of this team is to make implementing powerful embedded hardware systems a straightforward and enjoyable task from design creation through debugging and performance optimization. The team is responsible for the full stack of these tools from GUI, model and OS specific device drivers, soft-core processor design, hardware generators and hardware IP components.
We have the fortune of interacting in the highly dynamic space encompassing programmable hardware design, embedded system creation, processor design and embedded software development; designing tools and infrastructure to empower design engineers across these realms.
As a Verification Engineer in this position, you will need to be an expert in SystemVerilog, with a focus on authoring and using UVM-based testbenches. Our validation space is non-traditional in that we guarantee functionality across limitless permutations of adaptation modes and modules with our soft-NOC interconnect and as such our validation strategies employee high degrees of scalable and programable dynamicness. With this dynamicness, expertise in various scripting languages (perl, python, tcl), and the willingness and ability to learn, are a critical requirements. Familiarity with C, Java or other high-level languages is a plus. Some larger projects we’re undertaking include:
Conceiving, designing and implementing reusable test frameworks for IP
Creating testbench generators for complex, highly-parameterizable IP
Creating regression tests for IP components: functional, integration, static analysis
Measuring throughput, latency, and other quality-of-results metrics of IP components, and communicating those results
Validating home-grown microprocessor implementations
Validating FPGA debugging IP and software
We’ve assembled an energetic team of quality people and are looking for a couple more experienced engineers to help with the effort.
Verifications engineer will have a direct influence on the quality of our hardware implementations, and our ability to innovate rapidly while maintaining stable functionality. Tasks include the following:
Work closely with hardware designers to develop test frameworks that meet their needs
Write regression tests for complex parameterizable IP components
Research, define, and validate key customer use cases and design flows
Create reference RTL designs and embedded systems to validate components and software projects
Create, develop and use in-house measurement tools for tracking progress
Use Intel FPGA design tools like our customers to identify usability and productivity problems or missing features
Utilize the Platform Designer system design tool and accompanying software toolchain for Intel’s FPGA soft processors and ARM-based SoC solutions
BS degree in Electrical/Computer/Software Engineering or equivalent and 5+ years of relevant industry experience
Working knowledge in developing SystemVerilog-based simulation testbenches
Working knowledge with UVM
Knowledge of embedded software design flows and implementation would be a plus.
Familiarity with RiscV, Nios II or ARM-based embedded software development environments would be a strong plus.
Tcl, Perl, and/or Python scripting skills
Dedication to customer experience and usability
Good written and oral communication skills