To work on Intel next generation CPU SoC using advance process technology. Need to be familiar with industrial EDA tools from Synopsys and or Cadence Design System. The candidate is required to implement structural physical designs
- Understanding & hands on experience in full IC and block level SoC Physical Designs.
- Proactively demonstrating the knowledge in synthesis, FEV, STA.
- Proven the Experience Design floorplan, Clock Tree Synthesis, Power Network Synthesis, Place and Route, Physical Verification (DRC, LVS), DFM, SI(Xtalk).
- Verifying Low-Power design, UPF.
- Performing IR Drop/EM check.
- Minimum 3+ years of experience in the related area.
- Bachelor or Master’s Degree in Electronics Engineering/Telecommunications, Computer science, Physics electronics.
Required technical skills:
- Synopsys: Fusion/ICC2, StarRC, Primetime, VCLP.
- Cadence: Innovus, Quantus, Tempus.
- Mentor: Calibre.
- Proven experience in IC tape-outs.
- Deep understanding of the RTL2GDS flow design cycle.
- Understanding of CMOS process.
- Excellent scripting skills and CAD automation techniques.
- Linux/Unix proficient.
Inside this Business Group
- Good English skills.
- Strong analytical, problem solving and decision-making skills with the ability to independently draw conclusions.
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.htmlYour privacy matters to Intel and we comply with applicable data protection laws. We collect and maintain personal information for recruitment related activities and your data will not be used for any other purpose. We retain personal information for the periods and purposes set forth in Intel Privacy Notice
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This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.