Skip to main content

Server Memory Performance Architect

Hillsboro, Oregon; Santa Clara, California Job ID JR0220741 Job Category Engineering Work Mode Hybrid Experience Level Experienced
Job Description

Looking for a Fun, Challenging and Rewarding role at Intel?

Come and join us!

The XEON Performance Architecture (XPA) team is looking for a Memory Performance Architect to join their team. This team works hand in hand with our design, validation, and architecture teams to deliver best-in-class performance and innovations across the XEON CPU portfolio. The ideal candidate will have experience in computer architecture, software engineering, and performance analysis. As a Memory Performance Architect, you will help define and drive critical performance features for industry and customer leadership at both the architectural and micro-architectural levels. Additionally, you will work in a dynamic team environment, influencing and driving solutions for not just one XEON product, but across the entire road-map of current and future datacenter CPUs. Your responsibilities will include, but not be limited to: Memory subsystem performance modeling, studies, and analysis. Understanding server memory subsystem usage models and key performance indicators. Defining, planning, and scoping the performance modeling, studies, and analysis work. Distilling architectural and micro-architectural information down to the performance-important factors. Supporting architecture, design, and validation efforts throughout the entire product life cycle. Conducting forward looking research and development for next generation server memory subsystems. Developing analytical and simulation models, creating analysis tools, identifying bottlenecks, and presenting results. Inventing and modeling features that solve key problems and improve performance, power, area, and cost. Working with software and other enabling teams to continuously improve performance modeling infrastructure. Behavioral traits that we are looking for: problem solving, debugging, multi-tasking, and brainstorming skills. Outstanding communication skills, both written and verbal. A demonstrated ability to distill complex ideas into well-articulated and easy-to-understand messages.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum required qualifications and are considered an additional factor in identifying top candidates.

You must have a Bachelor's with 4+ years' experience, Master's with 3+ years of experience or PhD with 1+ years' experience and degree in Computer Engineering, Electrical Engineering, Computer Science, or related field and your experience should be in the following areas:
Computer architecture, simulation-based performance modeling, and performance analysis, above and beyond standard academic computer architecture coursework
Software engineering skills such as Linux, C++, GIT, GDB, and Python.

Preferred Skills and Experience that will make you stand out:

Experience with the following:

  • Internal and external customer engagements.

  • CPU architecture and microarchitecture, esp. related to technologies like DDR DRAM, HBM DRAM, and/or Intel Optane.

  • Server platforms, esp. related to workloads, usage models, board/chassis architecture, and deployment.

  • Developing, debugging, and using complex simulation models written in C++.

  • With software engineering practices including test driven development, tracking code coverage, and JIRA task management.

Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US,Santa Clara

Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here:

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • [MDCX] Analog Engineer Multiple Locations Apply Now
  • Senior Staff Process Engineer - Wet Etch/Cleans (SK) Multiple Locations Apply Now
  • Foundry Quality Reliability Engineer Multiple Locations Apply Now
View All Jobs

No jobs have been viewed recently.

View All Jobs

No jobs have been saved.

View All Jobs