Skip to main content

Senior ASIC Application Engineer - Customer Enablement

Hillsboro, Oregon; Phoenix, Arizona; Santa Clara, California Job ID JR0231261 Job Category Engineering Work Mode Hybrid Experience Level Experienced
Job Description

The Customer End-to-End (E2E) support for ASIC Place and Route is a critical and highly visible customer-facing role. You will drive customer requirements to collaboratively arrive at a competitive solution with Intel internal partners to meet customer needs.

The key focus is as follows:

  • Highly knowledgeable in the ASIC Place and Route tools and flows and adjacent domain to be able to understand and apply the technical concepts, architecture, systems, development methods, and drive solutions for the customer
  • Manages interdependencies and integration among multiple projects, teams, and stakeholders
  • Has decision making authority at the program level
  • Frame the project objectives, focuses, and navigates effort to solve problems, removes roadblocks, manages risks, schedules, drives recommendations to align senior management
  • Is the key interface with stakeholders and leadership internally in this domain
  • Exercises judgment and discretion to develop solutions, remove obstacles and redefine approaches
  • Oversees identification of tasks and research, dependencies, costs; communicates expectations to core team members
  • Ensures appropriate progress against schedule and takes remedial action as appropriate

The ideal candidate will demonstrate:

  • Experience interfacing with external customers in prior customer facing roles
  • Communication skills with ability to articulate and up level information based on the audience
  • Experience in analytical problem-solving capability and good teamwork with ability to work across organizational boundaries

Qualifications
  • Bachelor's OR Master's degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering or a related field
  • 8+ years of professional work experience
  • Experience in the following areas (having more than one will be preferred): ASIC flow knowledge of using either of Synopsys Fusion Compiler or Cadence Innovus; End-to-end digital flows and methodologies; EDA tools flows and methodologies for SoC Design, IP Library Development, and interacting with internal tool developers and external EDA vendors; Silicon process technology development and related process design kits (PDKs)


Preferred Qualifications:

  • Experience in using industry standard software engineering principles and demonstrate ability to drive changes towards industry standard practices and methodologies
  • Experience interacting with customers simultaneously, and highly skilled in the use of Excel and PowerPoint to develop detailed and compelling presentations that convey clear and impactful business stories

Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US,AZ,Phoenix;US,CA,Santa Clara


Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • [MDCX] Analog Engineer Multiple Locations Apply Now
  • Senior Staff Process Engineer - Wet Etch/Cleans (SK) Multiple Locations Apply Now
  • Packaging Research and Development Engineer Phoenix, Arizona Apply Now
View All Jobs

No jobs have been viewed recently.

View All Jobs

No jobs have been saved.

View All Jobs