IP Logic Design Engineer
This is a design engineer position in Security IP Foundational Security IP team which delivers Security solution across various market segments of Intel. It requires experience in digital logic design and/or exposure to pre/post-silicon validation.
Candidate will be responsible for logic design of various protocol related to Power Management, Fuse, DFX, Debug related features as part of Infrastructure IP Design and will be delivering to various teams in Intel across SOCs for DEG group's mobile / tablet and desktop CPUs and chipsets.
As a significant member of the team, he/she is responsible for defining and implementing the design, apply various strategy/tools/methods, Check the design for Lint, synthesizability, DFX, Analyze Clock crossing, Power, Performance implications for our Infrastructure IPs.
The candidate must work closely w/ the Architect/UArchitecture and Validation teams in designing new logic with the right implementation strategy and develop White Box Coverage plans, review design codes for efficiency/coverage.
The candidate will have the opportunity to engage with early prototyping (w/ FPGA, Emulation teams) and would support SOC integration and own Front End Design tools. Also the engineer will have the opportunity to work on various other areas of the IP such as micro-controllers, Crypto engines, mailbox, fabric controllers etc. and gain well rounded experience on the Security IP functionalities.
Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical leadership skills, passion for design/ tools and methodology and strong influencing skills.
Must have strong orientation for Quality, Commit / Deliver attitude and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
This is an entry level position and will be compensated accordingly.
The candidate must possess a Bachelor's degree in Electrical or Computer Engineering, or a Master's degree in Electrical or Computer Engineering with 1+ years of experience in:
Logic design processes
Knowledge of system Verilog & RTL design.
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