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IP Logic Design Engineer

Hillsboro, Oregon; Folsom, California; Santa Clara, California Job ID JR0236296 Job Category Engineering Work Mode Hybrid Experience Level Entry Level
Job Description

This is a design engineer position in Security IP Foundational Security IP team which delivers Security solution across various market segments of Intel. It requires experience in digital logic design and/or exposure to pre/post-silicon validation.

Candidate will be responsible for logic design of various protocol related to Power Management, Fuse, DFX, Debug related features as part of Infrastructure IP Design and will be delivering to various teams in Intel across SOCs for DEG group's mobile / tablet and desktop CPUs and chipsets.

As a significant member of the team, he/she is responsible for defining and implementing the design, apply various strategy/tools/methods, Check the design for Lint, synthesizability, DFX, Analyze Clock crossing, Power, Performance implications for our Infrastructure IPs.

The candidate must work closely w/ the Architect/UArchitecture and Validation teams in designing new logic with the right implementation strategy and develop White Box Coverage plans, review design codes for efficiency/coverage.

The candidate will have the opportunity to engage with early prototyping (w/ FPGA, Emulation teams) and would support SOC integration and own Front End Design tools. Also the engineer will have the opportunity to work on various other areas of the IP such as micro-controllers, Crypto engines, mailbox, fabric controllers etc. and gain well rounded experience on the Security IP functionalities.

Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical leadership skills, passion for design/ tools and methodology and strong influencing skills.

Must have strong orientation for Quality, Commit / Deliver attitude and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must possess a Bachelor's degree in Electrical or Computer Engineering, or a Master's degree in Electrical or Computer Engineering with 1+ years of experience in:

  • Logic design processes

  • Knowledge of system Verilog & RTL design.

Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US,CA,Folsom;US,CA,Santa Clara

Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here:

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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