CPU Core Logic Designer
This position is charted to deliver advanced Core IP and Client SOCs using latest technological and process innovations. The Core/CPU IP developed by the team goes into Intel's latest Client and Server SOCs.
Responsibilities of the role include, although not limited to:
Oversee definition, design, verification, and documentation for x86 Core (CPU) IP.
Design, development and delivery of RTL for a high performance, power/area efficient X86 Core (CPU) IP.
Analyze multiple uArch and implementation options to find the optimal design point considering power/performance/area/cost trade-offs.
Determine architecture design, logic design, and system simulation.
Developing a functional block/unit RTL model, then integrating and validating, planning and directing physical implementation and block integration.
Define module interfaces/formats for simulation.
Root cause regression/test failures, propose and implement logic bug fixes.
Skills at using sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others.
Skills to develop an implementation plan, monitor key indicators, and adjust resources and scope to deliver value on schedule.
Solid communication and collaboration skills.
Working with Global teams.
Tolerance to ambiguity.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience in:
Master's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience in:
System Verilog/Verilog/VHDL and/or VCS or similar Simulator.
Logic design and/or front end.
Computer architecture and microarchitecture.
Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.).
Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization.
Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
Experience with high speed circuit design and optimization for data path, circuits and/or arrays.
Familiarity with circuit planning and timing convergence.
Experience working with cross functional teams (Architecture, Spec development, Design, Formal, Verification).