Process Integration staff technologist/technical lead (PI/YE/RDA)
Non-Volatile Memory Device and Integration engineers are responsible for leading research and development in order to architect, develop and deliver leading edge non-volatile memory technologies to high volume manufacturing. They contribute to defining process and device architectures, technology collaterals as well as develop scaling paths for leading edge memory technologies. The scope includes development of new types of process and device architectures involving novel materials, structures and integration schemes to deliver industry leadership in density, performance, reliability and cost. They collaborate with technology development partners in defining goals, developing the vision, aligning strategy and driving fast paced silicon development to meet aggressive technology node cadences. In addition they work closely with the product and system teams to ensure seamless integration of the memory components into Intel system products as well as with the manufacturing Fabs to ensure a seamless technology transfer and ramp to support the full envelope of component and system products.
This position is associated with the sale of Intel's NAND memory and storage business to SK Hynix. You can read more about the transaction in the press release. The transaction will enhance the resources and potential of the business storage solutions including client and enterprise SSDs in the rapidly growing NAND Flash space amid the era of big data.
This is an exciting time to be at Intel: come join our NAND DTM group and work on the most advanced 3D NAND and SSD technology in the world. As the global leader in the semiconductor industry, Intel possesses industry leading SSD technology and the most capable Quadruple Level Cell (QLC) NAND Flash products and you will be part of a world class team that will transition to lead the SSD business at SK Hynix
This position aligns to Phase 2 of the transaction, which includes NAND technology and component development, along with fab operations. Employees aligned to Phase 2 will continue to be employed by Intel and will continue to develop NAND technology and components and manufacture NAND wafers at the fab. Phase 2 of the transaction is expected to close in March 2025 at which time employees aligned to this phase of the transaction will transition employment to SK Hynix
Hold a MS or PhD in Electrical Engineering Materials Science Physics Chemistry or Chemical Engineering relevant major
Minimum 2 years of direct experiences in integration device defect reduction yield analysis or process engineering organizations is required
Direct experience in 3D NAND technology development transfer ramping and sustaining are preferred
A proven history of technical problem solving through the creation of solutions that demonstrated creativity and out of box thinking
Excellent data extraction and analysis skills and well versed in DOE principles
Understanding of device physics in deciphering parametric data and understanding of fundamental integration and yield issues for key modules and critical device parameters are required
Understand defect metrology tool work principle capability inline detection challenge and have thoughts on opportunities
Demonstrating advanced understanding of electrical testing and device characterization and physics
Ability to multitask and be effective in providing timely solutions
Strong organizational and communication skills to manage tasks across Process Engineering areas to effectively execute and commit to deliverables