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Senior Physical DRC Verification and QA Engineer

Cairo, Egypt Job ID JR0235213 Job Category Software Engineering Work Mode Fully Remote Experience Level Experienced
Job Description

In the Runset QA domain and as a Senior Physical DRC Verification and QA Engineer, you are expected to perform the following:

  • Develop test patterns to qualify the physical design rules for correct implementations.
  • Develop automation to run regressions, auto detect issues and generate validation reports.
  • You are also expected to file bug reports and work closely with runset developers and rule writers on validating the rules.
  • Work closely with Technology development on providing feedback on rule wording and correctness.
  • Partner with rules owners to ensure clarity and accuracy of rules.
  • Work with EDA on tool developments/improvements to enhance performance, add functionality and improve capacity.

At Intel, Design Enablement (DE) is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers. Job include designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing. Responsibilities include capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and end to end testing of the software tools.


Qualifications

Minimum Education required:

  • Bachelor with 4+ years of professional experience in developing Calibre or ICV run sets and validation test cases.


Minimum Experience required in the following areas:

  • Design Rule Development using Calibre (SVRF and TVF), with exposure to VLSI design and execution.
  • Algorithmic development and translating rules into run sets.
  • At least fluent in one of the following: TCL, Python, Unix-Linux platforms.
  • Developing test cases to validate DRC, LVS, antenna, density and fill modules.


Preferred Qualifications:

  • Exposure to Synopsys ICV and Cadence Pegasus is a plus
  • Exposure to layout, schematic entry using Cadence Virtuoso and Synopsys Custom Designer
  • Exposure to semiconductor device physics models and technology scaling
  • Familiar with industry standard CAD tools flows for digital analog design

What We Offer:

At Intel, you come to work in a collaborative, supportive environment, where your equally brilliant colleagues will push you to be your best. There's no fear of failure-we know that's how innovation happens. And you'll never be bored.

We offer competitive benefits and pay, opportunities for professional development and the flexibility you need to achieve balance. Intel fosters a collaborative environment allowing the brightest minds in the world to come together to achieve exceptional results.


Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Working Model
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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