PDK Software Engineer - VLSI Physical Verification
This position is within the Design Enablement (DE) organization of Technology Development. The Runset Development team within this organization is looking for talented individuals to develop physical layout verification software (DRC, LVS, RC extraction) and support the latest Intel technologies and microprocessor designs. At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on innovative technologies. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems, enabling PDKs for Intel's most advanced process technologies, and drive PDKs towards industry standard methods and ease of use for the end customers.
The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors, and product design teams to develop and deliver high quality technology collaterals, models, and enablement of EDA tools.
Develop physical layout verification design rule checker (DRC), Layout vs Schematic (LVS), and RC extraction runsets using industry standard EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus)Work with the process development teams at Intel to define specifications for DRC, LVS, and RC extraction runsets
Coordinate development of technology features, develop QA plans, and drive test-cases development working with relevant stakeholders
Support PDK development and Intel design teams to debug and enhance runset quality and enhance runtime and usability of the runsets
Engage with internal partners and external EDA vendors to coordinate tool feature requirements and specification
Assess architecture and hardware limitations, plans technical projects in the design and development of CAD software
Help library teams at Intel with technology path finding activities
Bachelor of Science in Computer Engineering (CE), Electrical Engineering (EE) with 3+ years of semiconductor industry experience OR Master of Science in CE, EE with 2+ years of semiconductor industry experience.
Required semiconductor industry experience in the following areas:
DRC/LVS/Extraction runsets and EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus, and simulation tools)
Unix/Linux operating system
At least one of the following: C++, Python, Perl, TCL
VLSI design process, reliability verification, ESD concepts, standard cell library, and memory architectures
Knowledge in semiconductor device physics, models, parasitic extraction, and technology scaling
Experience with working in software repository management tools like Git