As a System Validation/Post-silicon Validation engineer you will work with team members to drive execution towards tape-in quality power-on readiness and post silicon validation. You will work with virtual platform simulation, FPGA emulation, and real hardware to ensure the devices meet our customers’ specifications and use cases.
Additional responsibilities include but are not limited to:
- Define validation requirement, access mechanism board requirement and test logic required to achieve validation coverage
- May involve validation plan document writeup, test content development, test content pre-silicon emulation, test content post silicon bring-up bench related debug
- May involve customer pre-silicon enablement, customer power-on and post silicon issue debug
- Creates, defines, and develops system validation environment and test suites.
- •Uses and applies emulation and platform level tools and techniques to ensure performance to spec.
- Responsible for the development of methodologies, execution of validation plans, and debug of failures.
The candidate must have a Bachelor’s / Master's Degree in Electrical Engineering/ECE or related field with 7 -12 years of experience in a post-silicon validation role with experience in developing test plans
- Familiarity with SoC/IP level architecture/design, Relevant experience in SOC/IP Post silicon validation
- Expertise in debugging and validating any of the following:
- SRIOV, Virtualization/Hypervisor,
- DDR, HBM, PCIe interfaces
- Display graphics driver / Media / 3D /Audio
- •Experience with lab equipment (Logic Analyzer, Oscilloscope, thermal streams protocol analyzers, etc.)
- Experience with C, C++, Perl, and/or Python
- Experience in a Linux/UNIX environment