Post-Si Validation Engineer
Minimum Qualifications: Development and debug of test cases in at least one area of Compute system like BIOS, Intel Firmware, Power management, System Debug of silicon IPs, Understanding of IA Architecture.
Experience in system level debug of chipsets and/or CPUs Post-Si testing and validation on package interfaces
Experience with Functional validation of Security Architectures using tools like SGX, TDX, TXT, Boot Guard, memory architecture and validating RAS features, microcode.
Experiance with Debug using JTAG/ITP/Design hooks
Silicon debug and characterization / Analysis of protocols of Ips (Eg: USB, PCIe Gen4/5, SATA etc.) including working with full system level validation teams to identify and close silicon issues
Good level of Python, Perl or C scripting. Validatin process and tool experience.
Good Knowledge on Operating Systems (RedHatLinux, Dabian Linux, MicrosoftWindows), Virtualization, KVM
In this position you will gain invaluable experience into the internal workings of servers and how servers at scale are managed. The ideal candidate will have a self-directed work ethic and a can-do attitude. Your responsibilities will include, but are not limited to: Developing Functional Validation (FV) Post-Si validation test plans based on customer requirements and silicon changes. Supervise execution or execute FV Post-Si validation test plans and provide rollup of test execution results. Capable of doing complex debug of FV test cases, SVOS,
Python SV scripts, and platforms. The ideal candidate should exhibit the following behavioral traits: Effective communication and partnership skills to work directly with customers, peers, and seniors from various disciplines, and/or stakeholders from remote sites. Adaptive personality that can work within a team environment with facing fast changing and sometimes complex or ambiguous stakeholder requirements. Can easily pick up and learn new technologies and trends. Skillsets in one or more of the following areas: Experience with FV of Security Architectures using tools like SGX, TDX, TXT, Boot Guard Experience with FV of memory architecture and validating RAS features using tools like Memicals Experience with FV of u-code using tools like Caf. Experience with FV of p-code and Power Management/PnP validation Experience with FV tools like SVOS, ITP/PythonSV, DFx Hooks, Racoon, Super Collider.Qualifications
Excellent communication and teamwork skills
Knowledge in SVOS, PythonSV, Cafe, and other Post-Si tool and process
Knowledge to understand and modify existing PythonSV scripts/tools
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.