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Platform Security Debug Engineer

Bengaluru, India Job ID JR0233337 Job Category Software Engineering Work Mode Hybrid Experience Level Experienced
Job Description
Integrates and debugs software across the stack for a specific product, platform, feature, or technology throughout the product lifecycle, including presilicon development, power on, and/or postsilicon development. Debugs software across multiple layers of the software stack including firmware, drivers, and operating systems. Develops a software debug plan and associated methodologies. Analyzes issues, manages sightings from various validation streams, determines root cause, and drives or develops improvements. Drives project stress and stability and supports power, performance, and key KPI task forces.
Job Description This position is for: Permanent blue badge employees only. Job Details: Job Description: Datacenter Engineering Group (DPEA-PAIV) is looking for talents for System Debugging to secure the SW quality by continuous integration. In this position, you will work with various functional teams (BIOS/BMC, Silicon, board design, OSV, etc) to enable Intel latest hardware platforms and technologies. You will have a chance to touch cutting-edge silicon, Windows and Linux OS and server hardware technologies and see how to apply those technologies in big internet companies. Your responsibilities will include but not be limited to: Study newest Intel hardware and platform features and track the enabling status of those features in silicon, low-level firmware/software, OS (e.g. Windows /Linux/VMware) Deep dive and root cause silicon enabling and system integration issues to sub system/source code level and drive sightings into closure by proactive physical work and/or coordination with relevant stakeholders on defect duplication and investigation. Closely collaborate with Intel silicon enabling, firmware development, and various components teams including storage, network, power and performance, I/O and silicon debug teams to troubleshoot and debug cross-discipline and complex integration issues on server platforms Define and drive the system debug process implementation and ingredient owner engagement/alignment. Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes Contribute to validation team on improving test plan/method to validate features and verify fixes Qualifications: This job is reserved for the person who is always passionate to putting new technology into practice in the fastest manner, exploring all possible alternatives for better solution, and pursuing constant improvement on test efficiency and coverage. You should possess a Master of Science degree in in Electrical Engineering, Computer Science or relevant technology with 7+ years of applicable industrial experience, or bachelor in aforementioned area with 10+ years of applicable industry experience. Additional qualifications include: Strong low level debugging skills that enable the root causing of issues at the firmware and hardware level and Operating System (OS) internals. Excellent programming skills (e.g. C/C++) that enable the source code level fixing of issues. Good experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues and proper. Solid understanding of Intel Architecture, Operating System, Driver, BIOS fundamentals, and FW fundamentals; Good understanding (and better hands-on development/validation experience) of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc; For security domain candidate, Work experience in networking, platform security TXT/TEE, SGX/SME/TSME/SEV. Experience in penetration test development (offensive) or defensive security test content design/development. For BIOS domain candidate, good x86 server BIOS development background and debug experience with Intel XDP is a must. Experience of ACPI, PCIe, RAS, security, NVRAM etc is a plus; For OS domain candidate, experience on Windows kernel debug and/or Linux kernel debug is a must; Experience of debugging/fixing Linux system power and performance issues is a plus; Experience of Linux kernel upstream development is a plus; For Hardware and I/O domain candidate, good knowledge and 3+ years enabling experience of hardware I/O or devices is a must, including but not limited to Intel RSTe, SSD technology, SAS and/or Networking (IB, 10Gb/40Gb Ethernet etc) ; server baseboard design experience is a plus; For Server Management domain candidate, good understanding and development experience of IPMI, redfish, NCSI, Node Manager and data center management philosophy is expected Experience with ITP and script language is highly preferred. Experience with PythonSV and programming with Python is a plus. Experience on silicon level debug (e.g. AFD - Array Freeze and Dump, and its analysis) is a good plus. Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders. Good English verbal and writing skills.
Inside this Business Group
The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here:

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Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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